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lt6236/lt6237 1 623637f typical application features description rail-to-rail output 215mhz, 1.1nv/hz op amp/sar adc driver the lt ? 6236/lt6237 are single/dual low noise, rail-to-rail output op amps that feature 1.1nv/hz input referred noise voltage density and draw only 3.5ma of supply current per amplifier. these amplifiers combine very low noise and supply current with a 215mhz gain bandwidth product and a 70v/s slew rate. low noise, fast settling time and low offset voltage make this amplifier optimal to drive low noise, high speed sar adcs. the lt6236 includes a shutdown feature that can be used to reduce the supply current to less than 10a. this amplifier family has an output that swings within 50mv of either supply rail to maximize the signal dynamic range in low supply applications and is specified on 3.3v, 5v and 5v supplies. the lt6236/lt6237 are upgrades to the lt6230/lt6231, offering similar performance with reduced wideband noise beyond 100khz. differentially driving a sar adc lt6237 driving ltc2389-18 f in = 2khz, C1dbfs, 32768-point fft applications n low noise: 1.1nv/hz n low supply current: 3.5ma/amp max n low offset voltage: 350v max n fast settling time: 570ns to 18-bit, 2v p-p output n low distortion: thd = C116.8db at 2khz n wide supply range: 3v to 12.6v n output swings rail-to-rail n 215mhz gain-bandwidth product n specified temperature range: C40c to 125c n lt6236 shutdown to 10a max n lt6236 in low profile (1mm) thinsot? package n dual lt6237 in 3mm 3mm 8-lead dfn and 8-lead msop packages n 16-bit and 18-bit sar adc drivers n active filters n low noise, low power signal processing l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. 623637 ta01a in C in C in + in + v s + = 6v 270pf 38.3 38.3 lowpass filters ltc2389-18 270pf 49.9 49.9 18-bit 2.5msps C + + C 1/2 lt6237 1/2 lt6237 v s C = C2v frequency (mhz) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 amplitude (dbfs) 62367 ta01b 0 C150 C140 C130 C120 C110 C100 C90 C80 C70 C60 C50 C40 C30 C20 C10 1.2 v out = 7.3v p-p hd2 = C129.5dbc hd3 = C118.7dbc sfdr = 117.7db thd = C116.8db snr = 99.7db sinad = 98.9db
lt6236/lt6237 2 623637f pin configuration absolute maximum ratings total supply voltage (v + to v C ) .............................. 12.6v input current (note 2) ......................................... 40ma output short-circuit duration (note 3) ............ indefinite operating temperature range (note 4)... C40c to125c (note 1) 1 2 3 6 5 4 top view s6 package 6-lead plastic tsot-23 v + enable Cin out v C +in t jmax = 150c, ja = 192c/w top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 9 4 3 2 1out a Cin a +in a v C v + out b Cin b +in b t jmax = 150c, ja = 43c/w underside metal connected to v C (pcb connection optional) 1 2 3 4 out a Cin a +in a v C 8 7 6 5 v + out b Cin b +in b top view ms8 package 8-lead plastic msop t jmax = 150c, ja = 273c/w order information lead free finish tape and reel part marking* package description specified temperature range lt6236cs6#pbf lt6236cs6#trpbf ltghm 6-lead plastic tsot-23 0c to 70c lt6236is6#pbf lt6236is6#trpbf ltghm 6-lead plastic tsot-23 C40c to 85c lt6236hs6#pbf lt6236hs6#trpbf ltghm 6-lead plastic tsot-23 C40c to 125c lt6237cdd#pbf lt6237cdd#trpbf lghn 8-lead (3mm 3mm) plastic dfn 0c to 70c lt6237idd#pbf lt6237idd#trpbf lghn 8-lead (3mm 3mm) plastic dfn C40c to 85c lt6237hdd#pbf lt6237hdd#trpbf lghn 8-lead (3mm 3mm) plastic dfn C40c to 125c lt6237cms8#pbf lt6237cms8#trpbf ltghp 8-lead plastic msop 0c to 70c lt6237ims8#pbf lt6237ims8#trpbf ltghp 8-lead plastic msop C40c to 85c lt6237hms8#pbf lt6237hms8#trpbf ltghp 8-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ specified temperature range (note 5).....C40c to125c maximum junction temperature .......................... 150c storage temperature range .................. C65c to 150c
lt6236/lt6237 3 623637f electrical characteristics t a = 25c, v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max unit v os input offset voltage lt6236 lt6237ms8 lt6237dd8 100 50 75 500 350 450 v v v input offset voltage match (channel-to-channel) (note 6) 100 600 v i b input bias current 510 a i b match (channel-to-channel) (note 6) 0.1 0.9 a i os input offset current 0.1 0.6 a input noise voltage 0.1hz to 10hz 180 nv p-p e n input noise voltage density f = 10khz, v s = 5v 1.1 1.7 nv/ hz i n input noise current density, balanced source input noise current density, unbalanced source f = 10khz, v s = 5v, r s = 10k f = 10khz, v s = 5v, r s = 10k 1 2.4 pa/hz pa/hz r in input resistance common mode differential mode 6.5 7.5 m k c in input capacitance common mode differential mode 2.9 7.7 pf pf a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1v to 4v, r l = 100 to v s /2 105 21 5.4 200 40 9 v/mv v/mv v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 v s = 3.3v, v o = 0.65v to 2.65v, r l = 1k to v s /2 90 16.5 175 32 v/mv v/mv v cm input voltage range guaranteed by cmrr, v s = 5v, 0v guaranteed by cmrr, v s = 3.3v, 0v 1.5 1.15 4 2.65 v v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v v s = 3.3v, v cm = 1.15v to 2.65v 90 90 115 115 db db psrr power supply rejection ratio v s = 3v to 10v 90 115 db minimum supply voltage (note 7) 3 v v ol output voltage swing low (note 8) no load i sink = 5ma v s = 5v, i sink = 20ma v s = 3.3v, i sink = 15ma 4 85 240 185 40 190 460 350 mv mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma v s = 5v, i source = 20ma v s = 3.3v, i source = 15ma 5 90 325 250 50 200 600 400 mv mv mv mv i sc short-circuit current v s = 5v v s = 3.3v 30 25 45 40 ma ma i s supply current per amplifier disabled supply current per amplifier enable = v + C 0.35v 3.15 0.2 3.5 10 ma a i enable enable pin current enable = 0.3v C25 C75 a
lt6236/lt6237 4 623637f electrical characteristics t a = 25c, v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max unit v l enable pin input voltage low 0.3 v v h enable pin input voltage high v + C 0.35v v output leakage current enable = v + C 0.35v, v o = 1.5v to 3.5v 0.2 10 a t on turn-on time enable = 5v to 0v, r l = 1k, v s = 5v 800 ns t off turn-off time enable = 0v to 5v, r l = 1k, v s = 5v 41 s gbw gain-bandwidth product frequency = 1mhz, v s = 5v 200 mhz f C3db C3db bandwidth v s = 5v, r l = 100 90 mhz sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v 42 60 v/s fpbw full-power bandwidth v s = 5v, v out = 3v p-p (note 9) 4.4 6.3 mhz t s settling time 0.1%, v s = 5v, v step = 2v, a v = 1 0.01% 0.0015% (16-bit) 4ppm (18-bit) 50 60 240 570 ns ns ns ns
lt6236/lt6237 5 623637f electrical characteristics the l denotes the specifications which apply over the 0c < t a < 70c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max unit v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 600 450 550 v v v input offset voltage match (channel-to-channel) (note 6) l 800 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.5 0.3 0.4 2.0 1.4 2.2 v/c v/c v/c i b input bias current l 11 a i b match (channel-to-channel) (note 6) l 1a i os input offset current l 0.7 a a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1v to 4v, r l = 100 to v s /2 l l l 78 17 4.1 v/mv v/mv v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 v s = 3.3v, v o = 0.65v to 2.65v, r l = 1k to v s /2 l l 66 13 v/mv v/mv v cm input voltage range guaranteed by cmrr v s = 5v, 0v vs = 3.3v, 0v l l 1.5 1.15 4 2.65 v v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v v s = 3.3v, v cm = 1.15v to 2.65v l l 90 85 db db psrr power supply rejection ratio v s = 3v to 10v l 85 db minimum supply voltage (note 7) l 3v v ol output voltage swing low (note 8) no load i sink = 5ma v s = 5v, i sink = 20ma v s = 3.3v, i sink = 15ma l l l l 50 200 500 380 mv mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma v s = 5v, i source = 20ma v s = 3.3v, i source = 15ma l l l l 60 215 650 430 mv mv mv mv i sc short-circuit current v s = 5v v s = 3.3v l l 25 20 ma ma i s supply current per amplifier disabled supply current per amplifier enable = v + C 0.25v l l 1 4.2 ma a i enable enable pin current enable = 0.3v l C85 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l v + C 0.25v v sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v l 35 v/s fpbw full-power bandwidth (note 9) v s = 5v, v out = 3v p-p l 3.7 mhz
lt6236/lt6237 6 623637f electrical characteristics the l denotes the specifications which apply over the C40c < t a < 85c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 700 550 650 v v v input offset voltage match (channel-to-channel) (note 6) l 1000 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.5 0.3 0.4 2.0 1.4 2.2 v/c v/c v/c i b input bias current l 12 a i b match (channel-to-channel) (note 6) l 1.1 a i os input offset current l 0.8 a a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1v to 4v, r l = 100 to v s /2 l l l 72 16 3.6 v/mv v/mv v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 v s = 3.3v, v o = 0.65v to 2.65v, r l = 1k to v s /2 l l 60 12 v/mv v/mv v cm input voltage range guaranteed by cmrr v s = 5v, 0v v s = 3.3v, 0v l l 1.5 1.15 4 2.65 v v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v v s = 3.3v, v cm = 1.15v to 2.65v l l 90 85 db db psrr power supply rejection ratio v s = 3v to 10v l 85 db minimum supply voltage (note 7) l 3v v ol output voltage swing low (note 8) no load i sink = 5ma v s = 5v, i sink = 20ma v s = 3.3v, i sink = 15ma l l l l 60 210 510 390 mv mv mv mv v oh output voltage swing high (note 6) no load i source = 5ma v s = 5v, i source = 20ma v s = 3.3v, i source = 15ma l l l l 70 220 675 440 mv mv mv mv i sc short-circuit current v s = 5v v s = 3.3v l l 15 15 ma ma i s supply current per amplifier disabled supply current per amplifier enable = v + C 0.2v l l 1 4.4 ma a i enable enable pin current enable = 0.3v l C100 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l v + C 0.2v v sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v l 31 v/s fpbw full-power bandwidth (note 9) v s = 5v, v out = 3v p-p l 3.3 mhz
lt6236/lt6237 7 623637f electrical characteristics the l denotes the specifications which apply over the C40c < t a < 125c temperature range. v s = 5v, 0v; v s = 3.3v, 0v; v cm = v out = half supply, enable = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 750 650 700 v v v input offset voltage match (channel-to-channel) (note 6) l 1000 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.5 0.3 0.4 2.0 1.4 2.2 v/c v/c v/c i b input bias current l 12 a i b match (channel-to-channel) (note 6) l 1.1 a i os input offset current l 1.2 a a vol large-signal gain v s = 5v, v o = 0.5v to 4.5v, r l = 10k to v s /2 v s = 5v, v o = 0.5v to 4.5v, r l = 1k to v s /2 v s = 5v, v o = 1v to 4v, r l = 100 to v s /2 l l l 62 14 3 v/mv v/mv v/mv v s = 3.3v, v o = 0.65v to 2.65v, r l = 10k to v s /2 v s = 3.3v, v o = 0.65v to 2.65v, r l = 1k to v s /2 l l 52 11 v/mv v/mv v cm input voltage range guaranteed by cmrr v s = 5v, 0v v s = 3.3v, 0v l l 1.5 1.15 4 2.65 v v cmrr common mode rejection ratio v s = 5v, v cm = 1.5v to 4v v s = 3.3v, v cm = 1.15v to 2.65v l l 90 85 db db psrr power supply rejection ratio v s = 3v to 10v l 85 db minimum supply voltage (note 7) l 3v v ol output voltage swing low (note 8) no load i sink = 5ma v s = 5v, i sink = 20ma v s = 3.3v, i sink = 15ma l l l l 60 225 550 425 mv mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma v s = 5v, i source = 20ma v s = 3.3v, i source = 15ma l l l l 80 240 700 470 mv mv mv mv i sc short-circuit current v s = 5v v s = 3.3v l l 15 15 ma ma i s supply current per amplifier disabled supply current per amplifier enable = v + C 0.15v l l 2 5ma a i enable enable pin current enable = 0.3v l C100 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l v + C 0.15v v sr slew rate v s = 5v, a v = C1, r l = 1k, v o = 1.5v to 3.5v l 31 v/s fpbw full-power bandwidth (note 9) v s = 5v, v out = 3v p-p l 3.3 mhz
lt6236/lt6237 8 623637f t a = 25c, v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 100 50 75 500 350 450 v v v input offset voltage match (channel-to-channel) (note 6) 100 600 v i b input bias current 510 a i b match (channel-to-channel) (note 6) 0.1 0.9 a i os input offset current 0.1 0.6 a input noise voltage 0.1hz to 10hz 180 nv p-p e n input noise voltage density f = 10khz 1.1 1.7 nv/ hz i n input noise current density, balanced source input noise current density, unbalanced source f = 10khz, r s = 10k f = 10khz, r s = 10k 1 2.4 pa/hz pa/hz r in input resistance common mode differential mode 6.5 7.5 m k c in input capacitance common mode differential mode 2.4 6.5 pf pf a vol large-signal gain v o = 4.5v, r l = 10k v o = 4.5v, r l = 1k v o = 2v, r l = 100 140 35 8.5 260 65 16 v/mv v/mv v/mv v cm input voltage range guaranteed by cmrr C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v 95 120 db psrr power supply rejection ratio v s = 1.5v to 5v 90 115 db v ol output voltage swing low (note 8) no load i sink = 5ma i sink = 20ma 4 85 240 40 190 460 mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma i source = 20ma 5 90 325 50 200 600 mv mv mv i sc short-circuit current 30 ma i s supply current per amplifier disabled supply current per amplifier enable = 4.65v 3.3 0.2 3.9 ma a i enable enable pin current enable = 0.3v C35 C85 a v l enable pin input voltage low 0.3 v v h enable pin input voltage high 4.65 v output leakage current enable = v+ C0.35v, v o = 1v 0.2 10 a t on turn-on time enable = 5v to 0v, r l = 1k 800 ns t off turn-off time enable = 0v to 5v, r l = 1k 62 s gbw gain-bandwidth product frequency = 1mhz 150 215 mhz sr slew rate a v = C1, r l = 1k, v o = C2v to 2v 50 70 v/s fpbw full-power bandwidth v out = 3v p-p (note 9) 5.3 7.4 mhz t s settling time 0.1%, v step = 4v, a v = 1, 0.01% 0.0015% (16-bit) 4ppm (18-bit) 60 80 470 1200 ns ns ns ns
lt6236/lt6237 9 623637f electrical characteristics the l denotes the specifications which apply over the 0c < t a < 70c temperature range. v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 600 450 550 v v v input offset voltage match (channel-to-channel) (note 6) l 800 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.7 0.5 0.4 2.2 1.8 2.2 v/c v/c v/c i b input bias current l 11 a i b match (channel-to-channel) (note 6) l 1a i os input offset current l 0.7 a a vol large-signal gain v o = 4.5v, r l = 10k v o = 4.5v, r l = 1k v o = 2v, r l = 100 l l l 100 27 6 v/mv v/mv v/mv v cm input voltage range guaranteed by cmrr l C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v l 95 db psrr power supply rejection ratio v s = 1.5v to 5v l 85 db v ol output voltage swing low (note 8) no load i sink = 5ma i sink = 20ma l l l 50 200 500 mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma i source = 20ma l l l 60 215 650 mv mv mv i sc short-circuit current l 25 ma i s supply current per amplifier disabled supply current per amplifier enable = 4.75v l l 1 4.6 ma a i enable enable pin current enable = 0.3v l C95 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l 4.75 v sr slew rate a v = C1, r l = 1k, v o = C2v to 2v l 44 v/s fpbw full-power bandwidth v out = 3v p-p (note 9) l 4.66 mhz
lt6236/lt6237 10 623637f electrical characteristics the l denotes the specifications which apply over the C40c < t a < 85c temperature range. v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 700 550 650 v v v input offset voltage match (channel-to-channel) (note 6) l 1000 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.7 0.5 0.4 2.2 1.8 2.2 v/c v/c v/c i b input bias current l 12 a i b match (channel-to-channel) (note 6) l 1.1 a i os input offset current l 0.8 a a vol large-signal gain v o = 4.5v, r l = 10k v o = 4.5v, r l = 1k v o = 2v, r l = 100 l l l 93 25 4.8 v/mv v/mv v/mv v cm input voltage range guaranteed by cmrr l C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v l 95 db psrr power supply rejection ratio v s = 1.5v to 5v l 85 db v ol output voltage swing low (note 8) no load i sink = 5ma i sink = 20ma l l l 60 210 510 mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma i source = 20ma l l l 70 220 675 mv mv mv i sc short-circuit current l 15 ma i s supply current per amplifier disabled supply current per amplifier enable = 4.8v l l 1 4.85 ma a i enable enable pin current enable = 0.3v l C110 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l 4.8 v sr slew rate a v = C1, r l = 1k, v o = C2v to 2v l 37 v/s fpbw full-power bandwidth v out = 3v p-p (note 9) l 3.9 mhz
lt6236/lt6237 11 623637f electrical characteristics the l denotes the specifications which apply over the C40c < t a < 125c temperature range. v s = 5v, v cm = v out = 0v, enable = 0v, unless otherwise noted. (note 5) symbol parameter conditions min typ max units v os input offset voltage lt6236 lt6237ms8 lt6237dd8 l l l 750 650 700 v v v input offset voltage match (channel-to-channel) (note 6) l 1000 v v os tc input offset voltage drift (note 10) lt6236 lt6237ms8 lt6237dd8 l l l 0.7 0.5 0.4 2.2 1.8 2.2 v/c v/c v/c i b input bias current l 12 a i b match (channel-to-channel) (note 6) l 1.1 a i os input offset current l 1.2 a a vol large-signal gain v o = 4.5v, r l = 10k v o = 4.5v, r l = 1k v o = 2v, r l = 100 l l l 76 21 4.1 v/mv v/mv v/mv v cm input voltage range guaranteed by cmrr l C3 4 v cmrr common mode rejection ratio v cm = C3v to 4v l 95 db psrr power supply rejection ratio v s = 1.5v to 5v l 85 db v ol output voltage swing low (note 8) no load i sink = 5ma i sink = 20ma l l l 70 230 550 mv mv mv v oh output voltage swing high (note 8) no load i source = 5ma i source = 20ma l l l 78 240 710 mv mv mv i sc short-circuit current l 15 ma i s supply current per amplifier disabled supply current per amplifier enable = 4.85v l l 10 5.5 ma a i enable enable pin current enable = 0.3v l C110 a v l enable pin input voltage low l 0.3 v v h enable pin input voltage high l 4.85 v sr slew rate a v = C1, r l = 1k, v o = C2v to 2v l 37 v/s fpbw full-power bandwidth v out = 3v p-p (note 9) l 3.9 mhz note 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2. inputs are protected by back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current must be limited to less than 40ma. note 3. a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4. the lt6236c/lt6236i/lt6236h and the lt6237c/lt6237i/lt6237h are guaranteed functional over the temperature range of C40c and 125c. note 5. the lt6236c/lt6237c are guaranteed to meet specified performance from 0c to 70c. the lt6236i/lt6237i are guaranteed to meet specified performance from C40c to 85c. the lt6236h/lt6237h are guaranteed to meet specified performance from C40c to 125c. the lt6236c/lt6237c are designed, characterized and expected to meet specified performance from C40c to 85c, but are not tested or qa sampled at these temperatures. note 6. matching parameters are the difference between the two amplifiers of the lt6237. note 7. minimum supply voltage is guaranteed by power supply rejection ratio test. note 8. output voltage swings are measured between the output and power supply rails. note 9. full-power bandwidth is calculated from the slew rate: fpbw = sr/2v p note 10. this parameter is not 100% tested.
lt6236/lt6237 12 623637f typical performance characteristics input bias current vs common mode voltage input bias current vs temperature output saturation voltage vs load current (output low) v os distribution supply current vs supply voltage (per amplifier) offset voltage vs input common mode voltage output saturation voltage vs load current (output high) minimum supply voltage output short-circuit current vs power supply voltage input offset voltage (v) C225 0 number of units 20 40 60 80 C125 C25 25 125 225 62367 go1 100 200 180 160 140 120 C175 C75 75 175 v s = 2.5v v cm = 0v ms8 total supply voltage (v) 0 supply current (ma) 6 62367 go2 24 8 6 5 4 3 2 1 0 10 12 14 t a = 125c t a = 25c t a = C55c input common mode voltage (v) 0 offset voltage (mv) 1.5 62367 go3 0.5 1 2 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 345 2.5 3.5 4.5 t a = C55c v s = 5v, 0v t a = 25c t a = 125c common mode voltage (v) C1 input bias current (a) 2 62367 go4 01 3 14 12 10 8 6 4 2 C2 0 456 t a = 125c t a = C55c t a = 25c v s = 5v, 0v temperature (c) C50 input bias current (a) 25 62367 go5 C25 0 50 10 9 8 7 6 5 4 3 75 100 125 v cm = 4v v cm = 1.5v v s = 5v, 0v load current (ma) 0.01 0.1 0.001 output saturation voltage (v) 0.01 10 1 100 10 62367 go6 0.1 1 v s = 5v, 0v t a = C55c t a = 125c t a = 25c load current (ma) output saturation voltage (v) 62367 g07 0.01 0.1 0.01 10 1 100 10 0.001 0.1 1 v s = 5v, 0v t a = C55c t a = 125c t a = 25c total supply voltage (v) 0 offset voltage (mv) 1.5 62367 g08 0.5 1 2 1.0 0.8 0.6 0.4 0.2 0 C0.2 C0.4 C0.6 C0.8 C1.0 345 2.5 3.5 4.5 t a = C55c t a = 125c t a = 25c v cm = v s /2 power supply voltage (v) 1.5 output short-circuit current (ma) 3 62367 go9 2 2.5 3.5 70 60 40 20 50 30 10 0 C20 C40 C70 C60 C10 C30 C50 4 4.5 5 t a = 125c t a = C55c t a = C55c t a = 25c sinking sourcing t a = 25c t a = 125c
lt6236/lt6237 13 623637f typical performance characteristics open-loop gain open-loop gain open-loop gain offset voltage vs output current warm-up drift vs time total noise vs total source resistance noise voltage and unbalanced noise current vs frequency 0.1hz to 10hz input voltage noise gain bandwidth and phase margin vs temperature output voltage (v) 0 input voltage (mv) 1.5 62367 g10 0.5 1 2 2.5 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 C2.5 32.5 r l = 100 r l = 1k v s = 3v, 0v t a = 25c output voltage (v) 0 input voltage (mv) 1.5 62367 g11 0.5 1 2 0 345 2.5 3.5 4.5 r l = 100 r l = 1k v s = 5v, 0v t a = 25c 2.5 2.0 1.5 1.0 0.5 C0.5 C1.0 C1.5 C2.0 C2.5 output voltage (v) C5 input voltage (mv) C2 62367 g12 C4 C3 C1 0 135 024 r l = 100 r l = 1k v s = 5v t a = 25c 2.5 2.0 1.5 1.0 0.5 C0.5 C1.0 C1.5 C2.0 C2.5 output current (ma) C75 offset voltage (mv) 62367 g13 C45 C15 2.0 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 030 75 60 C60 C30 15 45 t a = C55c t a = 125c v s = 5v t a = 25c time after power-up (s) 0 change in offset voltage (v) 60 62367 g14 20 100 30 28 24 20 16 26 22 18 14 12 10 140 40 80 120 160 t a = 25c v s = 5v v s = 2.5v v s = 1.5v source resistance () 1 total noise (nv/ hz) 10 10 1k 10k 100k 62367 g15 0.1 100 100 v s = 2.5v v cm = 0v f = 100khz unbalanced source resistors total noise resistor noise amplifier noise voltage frequency (hz) input voltage noise density (nv/ hz) unbalanced noise current (pa/hz) 8 7 6 5 4 2 1 3 0 8 7 6 5 4 2 1 3 0 10 1k 10k 100k 1m 10m 100m 62367 g16 100 v s = 2.5v t a = 25c v cm = 0v noise current noise voltage 5s/div 62367 g17 100nv 100nv/div C100nv v s = 2.5v v s = 2. 5v temperature (c) C55 gain bandwidth (mhz) 5 62367 g18 C25 35 240 220 200 180 140 160 phase margin (deg) 70 60 50 40 65 95 125 v s = 5v v s = 3v, 0v v s = 5v v s = 3v, 0v phase margin gain bandwidth c l = 5pf r l = 1k v cm = v s /2
lt6236/lt6237 14 623637f typical performance characteristics open-loop gain vs frequency gain bandwidth and phase margin vs supply voltage slew rate vs temperature output impedance vs frequency common mode rejection ratio vs frequency channel separation vs frequency power supply rejection ratio vs frequency series output resistance and overshoot vs capacitive load series output resistance and overshoot vs capacitive load frequency (hz) gain (db) 80 70 50 30 0 C10 60 40 10 20 C20 phase (db) 120 100 60 20 C60 80 40 C20 C40 0 C80 100k 10m 100m 1g 62367 g19 1m c l = 5pf r l = 1k v cm = v s /2 phase gain v s = 5v v s = 3v, 0v v s = 5v v s = 3v, 0v total supply voltage (v) 0 gain bandwidth (mhz) 6 62367 g20 24 8 220 240 200 180 140 160 phase margin (deg) 70 60 50 40 10 12 14 phase margin gain bandwidth t a = 25c c l = 5pf r l = 1k temperature (c) C55 slew rate (v/s) 5 62367 g21 C35 C15 45 90 100 110 120 80 70 50 20 30 60 40 85 25 65 105 125 v s = 5v falling v s = 2.5v rising a v = C1 r f = r g = 1k v s = 5v rising v s = 2.5v falling frequency (hz) 1 output impedance () 10 100k 10m 100m 62367 g22 0.01 0.1 1m 1k 100 v s = 5v, 0v a v = 10 a v = 1 a v = 2 frequency (hz) 20 common mode rejection ratio (db) 40 60 80 120 100 10k 100m 100k 1g 10m 62367 g23 0 1m v s = 5v, 0v v cm = v s /2 frequency (hz) 100k channel separation (db) C40 C50 C60 C70 C80 C90 C100 C110 C120 C130 C140 1m 10m 100m 62367 g24 a v = 1 t a = 25c v s = 5v frequency (hz) 20 power supply rejection ratio (db) 40 60 80 120 100 1k 10k 100m 100k 10m 62367 g25 0 1m v s = 5v, 0v t a = 25c v cm = v s /2 negative supply positive supply capacitive load (pf) 10 overshoot (%) 50 45 40 35 30 25 20 15 10 5 0 100 1000 62367 g26 v s = 5v, 0v a v = 1 r s = 10 r s = 20 r s = 50 r l = 50 capacitive load (pf) 10 overshoot (%) 50 45 40 35 30 25 20 15 10 5 0 100 1000 62367 g27 v s = 5v, 0v a v = 2 r s = 10 r s = 20 r s = 50 r l = 50
lt6236/lt6237 15 623637f typical performance characteristics settling time vs output step (noninverting) 18-bit settling time to 2v p-p output step 18-bit settling time to 4v p-p output step settling time vs output step (inverting) maximum undistorted output signal vs frequency distortion vs frequency distortion vs frequency distortion vs frequency distortion vs frequency output step (v) C4 settling time (ns) 0 62367 g28 C3 C2 C1 1 100 200 150 50 0 234 1mv 10mv 1mv 10mv v s = 5v t a = 25c a v = 1 + C 500 v out v in output step (v) C4 settling time (ns) 0 62367 g29 C3 C2 C1 1 200 150 0 50 100 234 1mv 10mv 1mv 10mv v s = 5v t a = 25c a v = C1 + C 500 500 v out v in frequency (hz) 10k output voltage swing (v p-p ) 10 9 8 7 6 5 4 3 2 100k 1m 10m 62367 g30 v s = 5v t a = 25c hd2, hd3 < C40dbc a v = C1 a v = 2 frequency (hz) 1k distortion (dbc) C50 C60 C70 C80 C90 C100 C110 C120 C130 100k 10k 1m 10m 62367 g31 v s = 2.5v a v = 1 v out = 2v p-p r l = 1k hd3 hd2 frequency (hz) 1k 10k distortion (dbc) C50 C60 C70 C80 C90 C100 C110 C120 C130 100k 1m 10m 62367 g32 v s = 5v a v = 1 r l = 1k v out = 4v p-p , hd2 v out = 2v p-p , hd2 v out = 2v p-p , hd3 v out = 4v p-p , hd3 frequency (hz) 1k distortion (dbc) C40 C50 C60 C70 C80 C90 C130 C100 C110 C120 100k 10k 1m 10m 62367 g33 v out = 4v p-p , hd2 v s = 2.5v a v = C1 r l = 1k v out = 2v p-p , hd3 v out = 2v p-p , hd2 v out = 4v p-p , hd3 frequency (hz) 1k distortion (dbc) C50 C60 C70 C80 C90 C100 C110 C120 C130 100k 10k 1m 10m 62367 g34 v s = 5v a v = C1 r l = 1k v out = 4v p-p , hd3 v out = 2v p-p , hd3 v out = 4v p-p , hd2 v out = 2v p-p , hd2 0.5s/div output voltage (v) 2.0 1.5 1.0 0.5 0.0 62367 g27a settling residue (v) 60 45 30 15 0 C15 C30 C45 C60 v s = 2.5v a v = 1 settling residue 1 div = 18-bit error v out 0.5s/div output voltage (v) 4 3 2 1 0 62367 g27b settling residue (v) 60 45 30 15 0 C15 C30 C45 C60 settling residue 1 div = 18-bit error v out v s = 5v a v = 1
lt6236/lt6237 16 623637f typical performance characteristics large-signal response output overdrive recovery (lt6236) enable characteristics supply current vs enable pin voltage enable pin current vs enable pin voltage enable pin response time 0v 5v C5v 2v/div 200ns/div 62367 g37 v s = 5v a v = 1 r l = 1k 0v 0v v in 1v/div v out 2v/div 200ns/div 62367 g38 v s = 2.5v a v = 3 pin voltage (v) supply current (ma) C1.0 62367 g39 C2.0 0 4.5 4.0 3.5 3.0 2.5 2.0 1.0 0.5 1.5 0 1.0 2.0 v s = 2.5v t a = 125c t a = 25c t a = C55c pin voltage (v) enable pin current (a) 62367 g40 30 25 20 15 10 5 0 t a = 125c v s = 2.5v a v = 1 t a = 25c t a = C55c C1.0 C2.0 0 1.0 2.0 0.5v 0v 0v 5v enable pin v out 100s/div 62367 g41 v s = 2.5v v in = 0.5v a v = 1 r l = 1k large-signal response small-signal response 2v 0v C2v 200ns/div 62367 g35 v s = 2.5v a v = C1 r l = 1k 1v/div 0v 50mv/div 200ns/div 62367 g36 v s = 2.5v a v = 1 r l = 1k
lt6236/lt6237 17 623637f functional description figure 1 is a simplified schematic of the lt6236/lt6237, which has a pair of low noise input transistors q1 and q2. a simple current mirror q3/q4 converts the differential signal to a single-ended output, and these transistors are degenerated to reduce their contribution to the overall noise. capacitor c1 reduces the unity cross frequency and improves the frequency stability without degrading the gain bandwidth of the amplifier. capacitor c m sets the overall amplifier gain bandwidth. the differential drive generator supplies current to transistors q5 and q6 that provide rail-to-rail output swing. input protection back-to-back diodes, d1 and d2, limit the differential input voltage to 0.7v. the inputs of the lt6236/lt6237 do not have internal resistors in series with the input transistors. this technique is often used to protect the input devices from over voltage that causes excessive current to flow. the addition of these resistors would significantly degrade the voltage noise of these amplifiers. for instance, a 100 resistor in series with each input would generate 1.8nv/hz of noise, and the total amplifier noise voltage would rise from 1.1nv/hz to 2.1nv/hz. once the input differential voltage exceeds 0.7v, steady state current conducted through the protection diodes should be limited to 40ma. this implies 25 of protec- tion resistance is necessary per volt of overdrive beyond applications information 0.7v. these input diodes are rugged enough to handle transient currents due to amplifier slew rate overdrive and clipping without protection resistors. figure 2 shows the output response to an input overdrive with the amplifier connected as a voltage follower. with the input signal low, current source i1 saturates and the differential drive generator drives q6 into saturation so the output voltage swings all the way to v C . the input can swing positive until transistor q2 saturates into current mirror q3/q4. when saturation occurs, the output tries to phase invert, but diode d2 conducts current from the signal source to the output through the feedback connection. the output is clamped a diode drop below the input. in figure 2, the input signal generator is limiting at about 20ma. with the amplifier connected in a gain of a v 2, the output can invert with very heavy overdrive. to avoid this inver- sion, limit the input overdrive to 0.5v beyond the power supply rails. figure 1. simplified schematic enable desd6 desd5 Cv +v +v in Cv in +v 62367 f01 bias differential drive generator v out +v c m i1 Cv desd3 Cv Cv desd4 +v desd1 Cv desd2 +v d1 c1 d2 q5 q6 q4 q2 q3 q1 figure 2. v s = 2.5v, a v = 1 with large overdrive 2.5v 0v C2.5v 500s/div 62367 f02 1v/div
lt6236/lt6237 18 623637f applications information esd the lt6236/lt6237 have reverse-biased esd protection diodes on all inputs and outputs as shown in figure 1. if these pins are forced beyond either supply, unlimited current will flow through these diodes. if the current is transient and limited to 100ma or less, no damage to the device will occur. noise the noise voltage of the lt6236/lt6237 is equivalent to that of a 75 resistor, and for the lowest possible noise it is desirable to keep the source and feedback resistance at or below this value, i.e. r s + r g ||r fb 75. with r s + r g ||r fb = 75 the total noise of the amplifier is: e n = (1.1nv) 2 + (1.1nv) 2 = 1.55nv / hz below this resistance value, the amplifier dominates the noise, but in the region between 75 and about 3k, the noise is dominated by the resistor thermal noise. as the total resistance is further increased beyond 3k, the amplifier noise current multiplied by the total resistance eventually dominates the noise. the product of e n ? i supply is an interesting way to gauge low noise amplifiers. most low noise amplifiers have high i supply . in applications that require low noise voltage with the lowest possible supply current, this product can be helpful. the lt6236/lt6237 have an e n ? i supply of only 1.9 per amplifier, yet it is common to see amplifiers with similar noise specifications to have e n ? i supply as high as 13.5. for a complete discussion of amplifier noise, see the lt1028 data sheet. enable pin the lt6236 includes an enable pin that shuts down the amplifier to 10a maximum supply current. for normal operation, the enable pin must be pulled to at least 2.7v below v + . the enable pin must be driven high to within 0.35v of v + to shut down the amplifier. this can be accomplished with simple gate logic; however care must be taken if the logic and the lt6236 operate from different supplies. if this is the case, open drain logic can be used with a pull-up resistor to ensure that the ampli- fier remains off. when the enable pin is left floating, the amplifier is inactive. however, care should be taken to control the leakage current through the pin so the amplifier is not inadvertently turned on. see typical performance characteristics. the output leakage current when disabled is very low; however, current can flow into the input protection diodes, d1 and d2, if the output voltage exceeds the input voltage by a diode drop. power dissipation the lt6237ms8 combines high speed with large output current in a small package. due to the wide supply volt- age range, it is possible to exceed the maximum junction temperature under certain conditions. maximum junction temperature (t j ) is calculated from the ambient tempera- ture (t a ) and power dissipation (p d ) as follows: t j = t a + (p d ? ja ) the power dissipation in the ic is the function of the sup- ply voltage, output voltage and the load resistance. for a given supply voltage, the worst-case power dissipation p d(max) occurs at the maximum quiescent supply current and at the output voltage which is half of either supply voltage (or the maximum swing if it is less than half the supply voltage). p d(max) is given by: p d(max) = (v + C v C )( i s(max) ) + (v + /2) 2 /r l example: an lt6237hms8 in the 8-lead msop package has a thermal resistance of ja = 273c/w. operating on 5v supplies with one amplifier driving a 1k load, the worst-case power dissipation is given by: p d(max) = (10v)(11ma) + (2.5v) 2 /1000= 116mw in this example, the maximum ambient temperature that the part is allowed to operate is: t a = t j - (p d(max) 273c/w) t a = 150c C (116mw)(273c/w) = 118.3c to operate the device at a higher ambient temperature for the same conditions, switch to using two lt6236 in the 6-lead tsot-23, or a single lt6237 in the 8-lead dfn package.
lt6236/lt6237 19 623637f interfacing to adcs when driving an adc, a single-pole, passive rc filter should be used between the outputs of the lt6236/lt6237 and the inputs of the adc. the sampling process of adcs creates a charge transient from the switching of the adc sampling capacitor. this momentarily shorts the output of the amplifier as charge is transferred between amplifier and sampling capacitor. the amplifier must recover and settle from this load transient before the acquisition period has ended for a valid representation of the input signal. the rc network between the outputs of the driver and the inputs of the adc decouples the sampling transient of the adc. the capacitance serves to provide the bulk of the charge during the sampling process, while the two resistors at the outputs of the lt6236/lt6237 are used to dampen and attenuate any charge injected by the adc. the rc filter provides the benefit of band limiting broadband output noise. thanks to the very low wideband noise of the lt6236/ lt6237, a wideband filter can be used between the amplifier and the adc without impacting snr. this is especially important with adcs or applications that require full settling in between each conversion. the selection of an appropriate filter depends on the specific adc, however the following procedure is sug- gested for choosing filter component values. begin by selecting an appropriate rc time constant for the input applications information signal. generally, longer time constants improve snr at the expense of settling time. output transient settling to 18-bit accuracy will require over twelve rc time constants. to select the resistor value, the resistors in the decoupling network should be at least 10. keep in mind that these resistors also serve to decouple the lt6236/lt6237 outputs from load capacitance. too large of a resistor will leave insufficient settling time. too small of a resistor will not properly dampen the load transient of the sampling process, and prolong the time required for settling. for lowest distortion, choose capacitors with low dielectric absorption such as a c0g multilayer ceramic capacitor. in general, large capacitor values attenuate the fixed nonlinear charge kickback, however very large capacitor values will detrimentally load the driver at the desired input frequency and cause driver distortion. smaller input swings allow for larger filter capacitor values due to decreased loading demands on the driver. this property may be limited by the particular input amplitude dependence of differential nonlinear kickback for the specific adc used. series resistors should typically be placed at the inputs to the adc in order to further improve distortion performance. these series resistors function with the adc sampling capacitor to filter potential ground bounce or other high speed sampling disturbances. additionally the resistors limit the rise time of residual filter glitches that manage to propagate to the driver outputs. restricting possible glitch propagation rise time to within the small signal bandwidth of the driver enables less disturbed output settling.
lt6236/lt6237 20 623637f typical applications single supply, low noise, low power, bandpass filter with gain = 10 driving a fully differential adc driving a single-ended adc + C r2 732 r4 10k c3 0.1f en lt6236 f 0 = 1 = 1mhz c = c1c2, r = r1 = r2 f 0 = ( 732 ) mhz, maximum f 0 = 1mhz f C3db = f 0 a v = 20db at f 0 en = 4v rms input referred i s = 3.7ma for v + = 5v 62367 ta02 0.1f c2 47pf c1 1000pf r3 10k r1 732 v out v + v in 2rc r 2.5 frequency (hz) 100k gain (db) 23 3 C7 1m 10m 62367 ta03 frequency response plot of bandpass filter 62367 ta04 in C in + 270pf 38.3 38.3 6v C2v 1/2 lt6237 lowpass filters 1/2 lt6237 ltc2389-18 270pf + C + C 49.9 49.9 v a v b 4.096v 0v 4.096v 0v 4.096v 0v or or 62367 ta05 in C in + 1nf 10 lowpass filter ltc2389-18 lt6236 + C 4.096v 0v 6v C2v 49.9 49.9
lt6236/lt6237 21 623637f package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 1.50 C 1.75 (note 4) 2.80 bsc 0.30 C 0.45 6 plcs (note 3) datum a 0.09 C 0.20 (note 3) s6 tsot-23 0302 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 C 0.90 1.00 max 0.01 C 0.10 0.20 bsc 0.30 C 0.50 ref pin one id note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref s6 package 6-lead plastic tsot-23 (reference ltc dwg # 05-08-1636)
lt6236/lt6237 22 623637f package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c)
lt6236/lt6237 23 623637f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 C 0.38 (.009 C .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 C 6 typ detail a detail a gauge plane 12 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt6236/lt6237 24 623637f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com linear technology corporation 2012 lt 1212 ? printed in usa related parts typical application part number description comments operational amplifiers lt6230/lt6231 single, dual low noise, rail-to-rail output. 1.1nv/hz lt6350 low noise, single-ended to differential converter/adc driver 4.8ma, -97dbc distortion at 100khz, 4vpCp output ltc6246/ltc6247/ltc6248 single/dual/quad 180mhz rail-to-rail low power op amps 1ma/amplifier, 4.2nv/ hz ltc6360 1ghz very low noise single-ended sar adc driver with true zero output hd2 = C103dbc and hd3 = C109dbc for 4v p-p output at 40khz adcs ltc2389-18 low power 18-bit sar adc 2.5 msps ltc2389-16 low power 16-bit sar adc 2.5 msps ltc2379-18 LTC2378-18 ltc2377-18 ltc2376-18 low power 18-bit sar adc 1.6 msps 1 msps 500 ksps 250 ksps + C r1 1.5k r2 1.5k c2 0.1f 5v C5v enable lt6236 200v bias advanced photonix 012-70-62-541 www.advancedphotonix.com 62367 ta06 c1 4.7pf output offset = 500v typical bandwidth = 20mhz output noise = 1.1mv p-p (100mhz measurement bw) 50ns/div 62367 ta07 30mv/div low power avalanche photodiode transimpedance amplifier i s = 3.3ma photodiode amplifier time domain response the lt6236 is configured as a transimpedance amplifier with an i-to-v conversion gain of 1.5k set by r1. the lt6236 is ideally suited to this application because of its low input offset voltage and current, and its low noise. this is because the 1.5k resistor has an inherent thermal noise of 5nv/ hz or 3.4pa/hz at room temperature, while the lt6236 contributes only 1.1nv/hz and 2.4pa/hz. so, with respect to both voltage and current noises, the lt6236 is actually quieter than the gain resistor. the circuit uses an avalanche photodiode with the cathode biased to approximately 200v. when light is incident on the photodiode, it induces a current i pd which flows into the amplifier circuit. the amplifier output falls negative to maintain balance at its inputs. the transfer function is therefore v out = C i pd ? 1.5k. c1 ensures stability and good settling characteristics. output offset was measured at 280v, so low in part because r2 serves to cancel the dc effects of bias current. output noise was measured at 1.1mv pCp on a 100mhz measure- ment bandwidth, with c2 shunting r2s thermal noise. as shown in the scope photo, the rise time is 17ns, indicating a signal bandwidth of 20mhz.

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